Function generator

ABSTRACT

A plurality of amplifiers have their outputs connected with an input signal to an analog adder. The amplifiers are disabled successively by a clamp. The adder output voltage versus input voltage curve is then a continuous function of contiguous straight line segments which increase or decline in slope in a steplike fashion. Function generator operation is insensitive to temperature and temperature changes produce no errors as in the prior art. The nonlinear voltage-current characteristic curve of the clamping diodes has no deleterious effect on function generator operation as in the prior art.

ilnited States Patent 11 1 1111 3,757,234

Ohlson Sept. 4, 1973 FUNCTION GENERATOR 3,436,559 4/1969 Wajs 328/142 x[75] Inventor: Gmmar E omsomRi-mkfordnu 3,622,770 11 1971 Edelson 235197 [73] Assignee: International Telephone and pn-mary w HuckertTelegraph. Corporatlon, Monterey Assistant E rg i r1 rB. P llavi W ParkCahf- Attorney-C. Cornell Remsen,Jr.,T. E. Kristofferson 22 Filed: Dec.27, 1971 et 21 App]. No.: 212,428

Related US. Application Data [63] Continuation of Ser. No. 70,186, Sept.8, 1970,

abandoned.

[57] ABSTRACT A plurality of amplifiers have their outputs connectedwith an input signal to an analog adder. The amplifiers are disabledsuccessively by a clamp. The adder output [52] U S Cl 328/142 307/229328/145 voltage versus input voltage curve is then a continuous [51 1 617/00 function of contiguous straight line segments which inl 58] Fieldl 48 143 crease or decline in slope in a steplike fashion. Func- 328/l45307/229 230 235/197 tion generator operation is insensitive totemperature and temperature changes produce no errors as in the [56]References Cited prior art. The nonlinear voltage-current characteristiccurve of the clamping diodes has no deleterious effect UNITED STATESPATENTS on function generator operation as in the prior art.

3,550,020 12/1970 Gill et al. 307/299 X 3,486,1l4 12/1969 Sitton 328/142X 16 Claims, 13 Drawing Figures An Ln l I l l I l P I I 0 Ab D5 l//\/P(/ T v '00 TPUT FUNCTION GENERATOR This application is acontinuation of copending application Ser. No. 70,186 filed Sept. 8,1970, and now abandoned for SQUARE ROOT EXTRACTOR. The benefit of thefiling date of said copending application is, therefore, hereby claimedfor this application.

BACKGROUND OF THE INVENTION This invention concerns nonlinear functiongenerators, and more particularly, to function generators of theapproximately straight line segment type.

Frequently, it it necessary or desirable to convert an input current orvoltage to an output which is a nonlinear function of the input. Anexample is the conversion of an input proportional to the pressuredifference across an orifice into an output proportional to the flowthrough the orifice. This involves extracting the square root of theinput. The present invention is by no means limited to this applicationalthough it has been found to have considerable utility therein.

In the past, several different types of function generators employingstraight line segments have been used. In one type zener diodes orbiased diodes were used in circuits to inhibit current until pluralcorresponding threshold voltages were exceeded. By judicious choice ofthreshold voltages and scaling factors, curves without substantialinflection could be approximated. Inaccuracies result from the use ofthese prior art function generators. This for the reason that dioderesistance changes due to changes in temperature. Further, the forwardvoltage drop across these is nonlinear with current.

SUMMARY OF THE INVENTION In accordance with the device of the presentinvention, the abovedescribed and other disadvantages of the prior artare overcome by providing means to generate an output signal by the useof clamping diodes. The clamping action is, thus, insensitive totemperature changes as in the prior art. Operation is also unaffected bythe nonlinear voltage-current characteristic curve of the clampingdiodes when they are forward biased, whereas such nonlinearity was adisadvantage of the piior art function generators.

Precise steps in the slopes of contiguous straight line segments of theoutput voltage versus input voltage curve of the present invention aremade possible. That is, the points joining the line segments are calledbreak joints herein.

One advantage of the invention may be expressed another way. Precisebreak points are made possible by freedom from the effects oftemperature sensitivity in the diodes.

According to the present invention, break points may also be preciselyand easily set without having any affeet on other break points.

The above-described and other advantages of the present invention willbe better understood from the following detailed description whenconsidered in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS In the drawings which are to beregarded as merely illustrative:

FIG. 1 is a block diagram of one embodiment of the present invention;

FIG. 2 is a schematic diagram of amplifier means which may be employedin the embodiment of FIG. 1;

FIG. 3 is a schematic diagram of alternative amplifier means which maybe employed in the embodiment of FIG. 1;

FIG. 4 is a schematic diagram of still another alternative amplifiermeans which may be employed in connection with the embodiment of FIG. 1;

FIG. 5 is a schematic diagram of an analog adder;

FIG. 6 is a block diagram of an alternative embodiment of the presentinvention;

FIG. 7 is a graph of an output versus input characteristics of thefunction generator of the present invention;

FIG. 8 is a graph illustrating an output versus input operatingcharacteristic of amplifier means shown in FIGS. 1 and 6.

FIG. 9 is a circuit diagram of still another embodiment of thisinvention;

FIG. 10 is a fragmentary circuit diagram showing a modification of FIG.9;

FIG. 11 is a graph of the present output versus percent input, showingthe straight line segments in an approximate square root extractor. Itis typical of curves generated by the circuits in FIGS. 9 and 10;

FIG. 12 is a circuit diagram of another embodiment of this invention;and

FIG. 13 is a graph of the percent output versus percent input for asquare function generator, which is typical of the curves approximatedbythe circuit of FIG. 12.

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the drawings in FIG. 1, apair of input terminals are indicated at 113 and 115, input terminal 115being grounded. A pair of output terminals 114 and 116 are also providedin FIG. 1, output terminal 116 being grounded.

Output terminal 114 receives the output of an analog adder 107. Adder107 may be entirely conventional. Adder 107 receives an input by a lead118 connected from terminal 113.

A plurality of amplifier means A1, A2, A3 An are provided respectivelywith output leads L1, L2, L3 Ln. The output leads L are connected asinputs to adder 107. Amplifier means A receive an input from terminal113.

Also shown in FIG. 1 are diodes D1, D2, D3 Dn respectively correspondingto amplifier means Al, A2, A3 An.

In FIG. 1, preferably the number of diodes D is equal to the number ofamplifier means A. Of course, the number of leads L will always be equalto the numer of amplifier means A. There may be any number of amplifiermeans A. A single amplifier means A is also possible in some cases, but,in general, at least two will be preferable. Moreover, a more accurateapproximation of a known curve is possible by using a greater number ofamplifier means A.

Source of potential means 119 are connected from the cathodes of all ofthe diodes D to ground.

Amplifier means 106 is shown in FIG. 2 including an input lead 100, anoutput lead 101, a differential amplifier 102 and resistors RA and RBhaving resistances, R and R respectively. Resistors RA and RB areconnected in series in that order from output lead 101 to ground.Resistors RA and RB have mutually joined ends at a junction 103. Inputlead 100 is connected to the noninverting input of amplifier 102,hereinafter sometimes referred to as the plus input. The output ofamplifier 102 is connected to output lead 101 at ajunction 104 to whichthe other end of resistor RB is also connected. Junction 103 isconnected to the inverting input of amplifier 102, sometimes referred toherein as the minus input.

Amplifier means A1, A2, A3 An may all be identical to amplifier means106, if desired, although the resistor resistances of any one of theamplifier means Ak may all be different from those of each of theothers, where k is l, 2, 3 or n.

' In order to understand the operation of the present invention, aperfectly clear understanding of the operation of a differentialamplifier is desirable. The same is true of the operation of amplifiermeans 106.

Typically, a positive increase in a positive voltage impressed upon theplus input of a differential amplifier will cause its output toincrease. Thus, e Ge where a is the output voltage, e is the plus inputvoltage and G is a constant which is called the gain of the amplifier.All this happens when the potential of the minus input remains constant.The output decreases (same gain) when a positively increasing positivevoltage is applied to the minus input. When both inputs vary,

nd G n: im)

where e is the plus input voltage and e is the minus input voltage.Notice the voltage difference. Hence, the name differential amplifier.

Typically, the gain of a differential amplifier may be 100,000, althoughlower values are possible and higher values even more likely.

With the connection of differential amplifier 102, the use of resistorsRA and RB'may be made to reduce and- /or adjust the usually very highgain. The output of amplifier 102 is connected to its minus input fromjunction 104 through resistor RB and a lead 105 from junction 103. Thismeans that if the plus input voltage varies, amplifier 102, e.g., with again, G, of 100,000 and, therefore, enough umph behind it, willimmediately push enough current through resistor RB in a direction fromjunction 104 to junction 103 to drive the potential of junction 103 tothat of the plus input. (Note that the amplifier 102 with relativelylarge gain, G, will tolerate only'an infinitesima difference between theplus and minus input potentials.) Some'finite difference is required foroperation, but this is only about l/G X 100 percent of the plus inputvoltage. Since l/G X 100 percent is only one one-thousandth of onepercent when G #100,000, it will be understood that, truly, one mayassume the potential at junction 103 to be equal to that on input lead100.

If the amplifier'102 pumps current. through resistor RB, where does thatcurrent go? The-"minus input impedance is very, very large and may beconsidered infinite for all practical purposes. All the RB current must,thus, effectively flow through RA. Thus,

td/ a nd ra/ a Then,

m a b) nd/ h Thus,

8 1/8 (l Rb/R Then, the gain, G, of amplifier means 116 is In FIG. 3,amplifier means are indicated at 120 including a difierential amplifier121, and a potentiometer 122. Potentiometer 122 includes a winding 123and a wiper 124. Winding 123 has a portion 125, as viewed in FIG. 3, onthe left hand side of wiper 124. Winding 123 also has a portion 126 onthe right hand side of the wiper 124, as viewed in FIG. 3. The left handside of winding 123 is connected to ground. Amplifier 121 has a plusinput 127, a minus input 128 and an output 129. Plus input 127 isconnected from an input lead 130. Output 129 is connected to an outputlead 131. Potentiometer wiper 124 is connected to the minus input 128.The right end of winding 123 is connected to the amplifier output 129 ata junction 132.

In accordance with the foregoing, it will be noted that effectively, thecircuit of FIG. 3 is identical to the circuit of FIG. 2 with wiper 124mounted in a fixed position. The function generator of the presentinvention is not limited to the use of potentiometer 122. However, itmay be found more useful and versatile when each of the amplifier meansA incorporate a potentiometer such as potentiometer 122.

Further, for purposes of definition, the phrase means providingresistance ishereby defined to include, but not be limited to, any oneof the following circuit elements: RA, RB, portion of potentiometerwinding 123, and portion 126 of winding 123.

Alternatively, amplifier means 133 are shown in FIG. 4. FIG. 4 may beidentical to amplifier means 120, shown in FIG. 3, except for theaddition of a resistor 134 connected in series between input lead andplus input lead 127 of amplifier 121. The input impedance is generallyvery high. For example, it may be in the megohm region. Resistor 134with input impedance 135 can thus serve to provide tailoring, ifdesired. Resistor 134 with the input impedance 135 can act simply as avoltage divider.

A schematic diagram of adder 107 is shown in FIG. 5. As statedpreviously, adder 107 may be entirely conventional. However, a review ofcertain fundamental concepts regarding the type of addition performedmay be helpful.

In FIG. 5, a differential amplifier 108 is shown having a grounded plusinput 109, a minus input 110 connected to a summing junction 111, and anoutput 112 connected to junction 111 by a feedback gain control resistorRC. 1

A resistor RD is connected from input terminal 113 to junction 111.Resistors R1, R2, R3 Rn are connected respectively from the outputs ofamplifier means A1, A2, A3 An to junction 111.

To understand the adding function of adder 107, shown in FIG. 5, assumethat each of the resistors R1, R2, R3 Rn have the same resistance, R.Also assume that the resistance of resistor RD is R,,, the resistance ofresistor RC is R, and R, R. (None of these conditions is necessary topractice the present invention.)

As before, the substantial gain of amplifier 108 will drive the minusinput potential down to that of the plus input potential. However, inFIG. 5, the plus input potential is ground. The potential of junction 1l l is, thus,

effectively ground. As before (for the potentials, e, see FIG. 5),

Thus, the summation. The gain may be changed by changing R Thus, R maybe made variable, if desired, for adjustable span. Zero can be suppliedby any conventional bias means.

The embodiment of FIG. 6 is identical to that of FIG. 1 except thatamplifiers A have their inputs connected from output terminal 1 14rather than from input terminal 113, as in FIG. 1. If in both FIGS. 1and 6, the voltage across input terminals 113 and 115 is e,,, and thevoltage across output terminals 114 and 116 is e,,,, then the rate ofchange of e with respect to e may be defined as D. For FIG. 1, D D,, theoverall gain is thus resistor RD but not through an amplifier (effectiveunity gain). The Ks are bilevel. They are a constant maximum or zero.They drop out one at a time.

For FIG. 6, D 0,, the overall gain, and K, K K +K K,,.

c/ l l e) o where,

e, is the voltage across input terminals 113 and 115, and

e, is the voltage across output terminals 114 and 116.

Thus, de lde, D,, which is the slope of curve 137 in FIG. 7, and

D2 KID: 1 and D 1/R/R K.

Note that 0,, equation (A), decreases as the K s drop out. D, increasesas the K 's drop out (K gets smaller).

The function generator of FIG. 1 will produce an output voltage, e whichis a function of the input voltage, e as indicated at 136 in FIG. 7. Theinput voltage e is, thus, impressed upon input terminal 113 in FIG. 1.The output voltage appears at terminal 114 in FIG. 1. Correspondingvoltages also appear at these same terminals in FIG. 6. However, in FIG.6, the output voltage, as a function of the input voltage, is indicatedat 137 in FIG. 7.

In connection with curve 136, note that curve 136 is made up of straightline segments 138, 139, 140 and 141.

Curve 137 is made up of straight line segments 142, 143 and 144.

In connection with curve 136, what happens is that the K terms inequation (A) are bilevel (have only two levelsmaximum or zero). Thus,each K term falls to zero in succession as e increases. (Absolute valuesused throughout.) The drop in a K value is made substantially in a stepfunction fashion from a finite positive value larger than zero to zero.Thus, where line segments 138 and 139 meet at a point 145, as 2,,increases, one amplifier output has been clamped to the potential of thepositive pole of battery 119 and has, more or less, been renderedinoperative. It no longer amplifies to any substantial extent. Thecorresponding gain term K in equation (A) no longer appears there. Ithas dropped out. It is zero.

Equation (A) also shows that the overall gain, D of the functiongenerator is a function of the sum of the gains of each of the amplifiermeans A. D,, thus, declines with cecreasing Ks. Each amplifier means Adrops out in succession depending upon the gain thereof. The gainthereof may be the same or different. If each amplifier means A is ofthe amplifier means 106 type shown in FIG. 2, the resistorscorresponding to the resistors RA and RB in each amplifier means shownin FIG. 1 may be different.

In accordance with the foregoing, the slope of line segment 138 is equalto the right hand side of equation (A), where none of the K terms areequal to zero.

It, thus, appears that the gain drop out function of clamping theamplifier means A is what contributes to the change in slope of thedifferent line segments of curve 136. The discrete changes in slope areindicated by angles )8, y and A.

As stated previously, the slope of line segment 138 is equal to theright hand side of equation (A). Thus, when all of the amplifier means Ahave their outputs clamped, and if R R,, D, -l. The eventual lower slopelimit of curve 136 in that case, then is unity. The same is true in thecase of D The embodiment of FIG. 6 operates similarly. Instead ofsupplying amplifier means A with an input from terminal 113, as in FIG.1, in FIG. 6, output terminal 114 is connected to the inputs ofamplifier means A. Curve 137 in FIG. 7, thus, results. Curve 137 islikewise a step function type curve where, when the output of eachamplifier means A is clamped in succession, line segments 142, etc., areformed. As will be understood, the characteristic curve of FIG. 13 isonly approximate. The true curve of FIG. 13 is not actually a smoothcurve, but involves step functions of the type illustrated at 142, 143,144, etc., in FIG. 7. Note in equation (B), K, is the sum of theamplifier means gains. Thus, as each individual amplifier means gain islost or reduces from its unclamped finite value to zero, D increases ina stepwise fashion whereas D, increased. Note that the K's are in thenumerator in equation (A) and in the denominator in equation (B). SeeK,. The amplifier means provide negative feedback. They are connected tothe inverting input of the adder amplifier. The discrete line segmentslope steps are indicated in relation to the line segments of curve 137at c and 6.

In FIG. 8, the output voltage of one amplifier means is indicated ate,,,,. The input voltage thereto is indicated at e The curve on thisgraph is indicated at 146. It has two substantially straight linesegments 147 and 148. These are joined at a point 149. Curve 146,including both of the line segments 147 and 148, are idealized. Thesecharacteristic curves occur only if the clamping diode is perfect andhas zero resistance when forward biased and an infinite resistance whenreverse biased. However, even practical diodes are close to idealdiodes. The curve 146 is on a greatly enlarged scale. Thus, even thoughthe scale is large, the practical curve 152 differs from the ideal curvevery little. Dotted line 152 is slightly convex in an upward direction,as viewed in FIG. 8.

The type of amplifier means of differential amplifier disclosed hereinmay be said to be saturated when the voltage across a correspondingdiode is zero. This may occur at point 150. However, the definition ofsaturation is rather loose as it is conventionally used in the art, andmay be applied to the said type of amplifier means or differentialamplifier at some point on line 152 somewhat above point 150. The truecurve of FIG. 8 has no straight line portion 148 but is close thereto.

The function generator of F IG. 9, as shown, employs an operationalamplifier 1 in a summer and four operational amplifiers 2, 3, 4 and 5 asnoninverting gain stages. Means are provided by which the gains of theamplifiers 2, 3, 4 and 5 are fixed at different predetermined valuesZ11, Z33, 244 and Z55, respectively. As shown, this is accomplished bysetting the ratios of their input to feedback impedances as by thepotentiometers 6, 7, 8 and 9, respectively. The potentiometers areconnected between a reference voltage conductor 10 and the respectiveoutput terminals 11, 12, 13 and 14 of the gain stages. The wipers 15,16, 17 and 18 of the potentiometers are connected to respectiveinverting input terminals 19, 20, 21 and 22 of the gain stages. Thenoninverting input terminals 23, 24, 25 and 26 are joined throughrespective input resistors 27, 28, 29 and 30 to an input conductor 31.Resistor 32, serving as a scaling resistor, is connected between theinput conductor 31 and a summing junction 33. Additional scalingresistors 34, 35, 36 and 37 are connected between the output terminals11, 12, 13 and 14, respectively, and the summing junction 33. A feedbackresistor 38 is connected between output conductor 39 and the summingjunction 33, which is joined to the inverting input terminal 40 ofamplifier 1. The noninverting input terminal 41 of amplifier 1 isconnected to the reference voltage conductor 10.

Means are provided to limit the branch voltages E11, E12, E13 and E14produced at output terminals 11, 12, 13 and 14, respectively, withrespect to the reference voltage on conductor 10 to predeterminedsaturating voltages V11, V12, V13 and V14, respectively. As shown, thesaturating voltages V11, V12, V13 and V14 are all the same value, butthis is not required. Diodes 42, 43, 44 and 45 are connected to therespective terminals 11, 12, 13 and 14 to divert current from thescaling resistors 34, 35, 36 and 37 when the voltage at the terminalsreach the saturating values V11, V12, V13 and V14 so that these voltagesare maintained as limits. In the embodiment of FIG. 9, all of thesaturating voltages V11, V12, V113 and V14 are established by a reversebias potential source 46 (shown as a battery) connected between theconductor 10 and each of the diodes 42, 43, 44 and 45, which may bematched for forward voltage drop. The saturating voltage is the sum ofthe reverse bias potential V40 and the forward voltage drop of thematched diodes. When the signal reeived on input conductor 31 ispositive with respect to the reference voltage, the diodes and biaspotential source are poled as shown in FIG. 9. When the signal isnegative with respect to the reference voltage, the diodes and biaspotential source are poled as shown in FIG. 10, while all otherconnections are made as shown in FIG. 9. The diodes and bias potentialsource of FIG. 10 could be added to FIG. 9 to accommodate input signalsof either polarity.

If we let I32, I34, I35, I36, I37 and 101 represent the currents throughresistors 32, 34, 35, 36, 37 and 38, respectively, the summation of thecurrents entering and leaving the summing junction 33 is shown by theequation:

- As stated previously, in an operational amplifier such as 1, there iseffectively no potential difference between the input terminals 41) and41, so, if we let R32, R34, R35, R36, R37 and R38 represent theresistances of resistors 32, 34, 35, 36, 37 and 38, respectively, E,represents the input signal voltage measured between input conductor 31and reference conductor 10, E39 represents the voltage between summingjunction 33, or the reference conductor 10, and output conductor 39, andE, represents the output signal voltage measured from output conductor39 to the reference conductor 10, equation (I) may be rewritten as:

E, R38 (E,/R32 El 1/R34 E12/R35 El3/R36 E14/R37) 2 This equation is theequation of a scaling summer, which will be recognized as comprisingamplifier 1 and the resistors 32, 34, 35, 36, 37 and 38.

When the branch voltage at any of the output terminals 11, 12, 13 and 14exceeds the corresponding saturating voltage V11, V12, V13 and V14, thediode 42, 43, 44 or 45 connected from that output terminal to the source46 will conduct in the forward direction and prevent the voltage at thatoutput terminal from exceeding the saturating voltage. The associatedone of the amplifiers 2, 3, 4 and 5 is then sometimes said herein tobesaturated. By adjusting the wipers 15, 16, 17 and 18 on thepotentiometers 6, 7, 8 and 9, respectively, the amplifiers 2, 3, 4and-5, respectively, may be made to saturate at different values of theinput signal on conductor 31. None, some or all of the amplifiers 2, 3,4 and 5 may be saturated at any given time, depending upon the value ofthe input signal. It will be apparent that when all of the amplifiersare saturated, equation (2) becomes:

E, R38 (E,/R32 V1 1/R34 VIZ/R35 V13/R36 V14/R37) 3 Since all of the Vand R terms are constant,

- R38/R32 -E, K

Since E11 Z22 E equation reduces to:

E, -R38 (1/R32 Z22/R34) E, K1

which may be interpreted as above. As each successive amplifier becomesunsaturated, a new straight line segment is begun, each segment beingdetermined as illustrated above. By judicious choice of saturationvoltages, gains and sealing resistances, a wide variety of curves may beapproximated, the accuracy of approximation also being dependent uponthe number of straight line segments employed along, and especially inrelation to the radius of curvature required.

FIG. 12 shows another embodiment in which corresponding components havebeen given the same reference numerals as in FIG. 9. In this species,the saturating gain amplifiers 2, 3, 4 and 5 are connected in parallelwith the feedback resistor 38, now acting as a scaling resistor, whileresistor 32 serves as the sole inverting input impedance to the summingamplifier 1. The output equation for this circuit is:

E -R38 (E,/R32 E1 1/R34 E12/R35 E13/R36 E14/R37) (7 It will be notedthat this is identical to equation (1) except for the sign on the E,/R32term. This shows that by plotting absolute values of output againstinput of FIG. 13, the curve would be concave upward instead of downward,as in FIG. 11. Once again, the polarity of the diodes 42, 43, 44 and 45and of the battery 46 would be reversed, as in FIG. 10, if the polarityof the input signal were reversed.

With a fixed bias potential source 46, the amplifiers 2, 3, 4 and 5 maybe adjusted to saturate at any desired values of the input voltage E31by adjusting the wipers 15, 16, 17 and 18 to provide the gain requiredto cause saturation at such values. Each gain is adjustableindependently of the others, permitting accurate setting of the breakpoints in the output versus input curves.

While a battery is shown as the bias potential source 46, a regulatedvoltage source compensated for the effects of temperature on diodes 42,43, 44 and 45 is generally used. It may be any of the applicableregulated voltage sources that are well known in the art.

It will be obvious to those skilled in the art to insert an invertingamplifier in any embodiment of the present invention if the output is tobe of the same polarity as the input.

While scaling resistors are specified in the embodiments described,those skilled in the art will recognize that other impedances can beused in other embodiments including, but not limited to, those dependentupon shifts in frequency.

In some cases, individual diode back bias sources of potential may besubstituted for batteries. 119 and 46, one for one or more or each ofthe diodes shown in FIGS. 1, 6, 9, and 12. In these cases, the diodesneed not be uniformly poled. An analog adder will add (subtract)negative and positive voltages. In any event, two or more of the diodesmay have a single source of potential connected thereto, and the restmay be connected any way disclosed herein. Further, all of the diodesshown in FIGS. 1, 6, 9, I0 and 12 may be poled in the opposite directionprovided that suitable batteries 119 and 46 are poled in the oppositedirection.

Optionally, in some cases, resistor 32 may be omitted.

In accordance with one feature of the present invention, in FIGS. 1, 4and 5, resistor RD may be employed with one amplifier means 133, anadder 107 and the remainder of the amplifier means A omitted.

In accordance with another feature of the invention, in FIG. 9, resistor32 may be omitted, and all the amplifier means other than thoseincluding amplifiers 2 and 3 omitted. Note will be taken that there arefour amplifier means in FIG. 9 identical to amplifier means 133 shown inFIG. 4.

From the foregoing, it will be appreciated that one feature of theinvention may be employed with any one or more or all of the otherfeatures without departing from the invention. Moreover, any one featureof the invention may be used by itself.

The phrase amplifier means is defined herein to include, but not belimited to, amplifier means 106 shown in FIG. 2, amplifier means shownin FIG. 3, amplifier means 123 shown in FIG. 4, any of the amplifiermeans A, any amplifier and any differential amplifier disclosed herein.

The potentiometers disclosed herein are not absolutely necessary to thepractice of the present invention. For example, note that there is nopotentiometer in FIG. 2. However, potentiometers may be found useful inmaking the function generator of the present invention adjustable.

In accordance with the foregoing, the phrase means to provide resistanceis hereby defined to include, but not be limited to, resistor RA,resistor RB, potentiometer winding portion 125, potentiometer windingportion 126, winding portion 154 of potentiometer Winding 156,potentiometer winding portion 155 or potentiometer winding portions onopposite sides of wipers 15, 16, 17 and 18 shown in FIG. 9, or onopposite sides of wipers 15, 16, 17 and 18 shown in FIG. 12.

It is to be understood that neither the construction nor operatingcharacteristics of any circuit component disclosed herein need be thesame as that of any other circuit component so disclosed. Althoughuniformity in some respects may be helpful as regards one or morespecific components, the invention is by no means limited to anyparticular uniformity in structures disclosed herein.

Gains of all the amplifiers and amplifier means disclosed herein mayeither all be the same or all different or a combination. However, thebreak points should all be at different locations. In some cases, thisrequires different gains for the amplifier means A of FIGS. 1 and 6because the break point location is determined by the voltage of battery119 and the amplifier means gain. It

is undesirable (wasteful) to have two identical break points.

What is claimed is:

1. A function generator comprising: an input lead; an output lead; areference conductor providing a point of predetermined referencepotential; a main differential amplifier having noninverting andinverting inputs, and an output connected to said output lead, thenoninverting input to said main amplifier being connected to saidreference conductor; a summing junction; a main feedback resistorconnected from said input lead to said summing junction; first amplifiermeans including a first auxiliary differential amplifier and first andsecond means to provide resistance; second amplifier means including asecond auxiliary differential amplifier, and third and fourth means toprovide resistance, each of said auxiliary amplifiers havingnoninverting and inverting inputs, and an output, the noninverting inputof said first amplifier being connected to one of said leads, thenoninverting input of said second amplifier also being connected to oneof said leads; a first diode having anode and cathode electrodes, one ofsaid first diode electrodes being connected from the output of saidfirst amplifier; a second diode having anode and cathode electrodes, oneof said second diode electrodes being connected from the output of saidsecond amplifier; source of potential means connected between saidreference conductor and the other diode electrodes, said diodes beingpoled in a direction to be back biased by said source of potentialmeans, said first and second means being connected in series in thatorder from said reference conductor to said one electrode of said firstdiode, said third and fourth means being connected in series in thatorder from said reference conductor to said one electrode of said seconddiode, the inverting input of said first amplifier being connected at apoint between said third and fourth means; and first and secondauxiliary summing resistors connected from the respective outputs ofsaid first and second amplifiers to said summing junction.

2. The invention as defined in claim 1, wherein the noninverting inputsof said first and second amplifiers are connected to the selfsame saidone lead.

3. The invention as defined in claim 2, wherein said one lead is saidinput lead.

4. The invention as defined in claim 3, wherein each of said first andsecond means is a portion of a continuous resistive first winding, and afirst wiper in slidable engagement with said first winding at said pointbetween said first and second means, each of said third and fourth meansbeing a portion of a continuous resistive second winding, and a secondwiper in slidable engagement with said second winding at said pointbetween said third and fourth means, said first winding and said firstwiper forming a first potentiometer, said second winding and said secondwiper forming a second potentiometer, said first and second wipers beingof said first and second amplifiers, respectively.

5. The invention as defined in claim 4, including first and second inputresistors connected from said input lead to the noninverting inputs ofsaid first and second amplifiers, respectively, said first amplifiermeans hav-' ing a gain different from that of said second amplifiermeans, said source of potential means being a single source ofpotential.

6. The invention as defined in claim 2, wherein said one lead is saidoutput lead.

7. The invention as defined in claim 6, wherein each of said first andsecond means is a portion ofa continuous resistive first winding and afirst wiper in slidable engagement with said first winding at said pointbetween said first and second means, each of said third and fourth meansbeing a portion ofa continuous resistive second winding, and a secondwiper in slidable engagement with said second winding at said pointbetween said third and fourth means, said first winding and said firstwiper forming a first potentiometer, said second winding and said secondwiper forming a second potentiometer, said first and second wipers beingconnected to the inverting inputs of said first and second amplifiers,respectively.

8. The invention as defined in claim 7, wherein each of said secondinput resistors connected from said input lead to the noninvertinginputs of said first and second amplifiers, respectively, said firstamplifier means having a gain different from that of said secondamplifier means, said source of potential means being a single source ofpotential, said first amplifier means having a gain different from thatof said second amplifier means, said source of potential means being asingle source of potential.

9. The invention as defined in claim 3, wherein said first amplifiermeans has a gain different from that of said second amplifier means,said source of potential means being a single source of potential.

10. the invention as defined in claim 6, wherein said first amplifiermeans has a gain different from that of said second amplifier means,said source of potential means being a single source of potential.

1 1. A function generator comprising: first and second main input leads;first and second main output leads, said second main leads beingconnected together; an analog adder having at least first and secondinput leads, and an output leadconnected to said first main output lead,said first main input lead being connected to said first adder inputlead; amplifier means having an input and an output, said amplifiermeans input being connected from one of said first main leads, saidamplifier means output being connected to said adder second input lead;and means to clamp said amplifier means output to a predeterminedconstant potential.

12. A function generator comprising: a main input lead; a main outputlead; a reference conductor providing'a point of predetermined referencepotential; an analog adder having at least first and second input leads,a first reference lead connected to said reference conductor, and anoutput lead connected to said main output lead; first and secondamplifier means each having an input lead connected from one of saidmain leads, and a second reference lead connected to said referenceconductor, said first and second amplifier means having first and secondoutput leads, respectively, said amplifier means first and second outputleads being connected to said first and second adder input leads,respectively; and means to clamp the outputs of both of said amplifiermeans to the same constant predetermined potential.

13. A function generator comprising: a main input lead; a main outputlead; a reference conductor providing a point of predetermined referencepotential; an analog adder having at least first, second, third n" inputleads, where n is any positive integer, said adder having an output leadconnected to said main output lead;

first, second, third n" amplifier means each having an input leadconnected from one of said main leads, said first, second, third n'amplifier means having first, second, third n"' output leads,respectively, said amplifier means first, second, third n output leadsbeing connected respectively to said first, second, third n adder inputleads; and means to clamp the outputs of all of said amplifier means tothe same constant predetermined potential.

14. A function generator comprising: a main input lead; a main outputlead; a reference conductor providing a point of predetermined referencepotential; an analog adder having at least first, second third n inputleads, where n is any positive integer, said adder having an output leadconnected to said main output lead;

first, second, third n" amplifier means each having an input leadconnected from one of said main leads, said first, second, third n"amplifier means having first, second, third n output leads,respectively, said amplifier means first, second, third n" output leadsbeing connected respectively to said first, second, third n" puts of allof said amplifier means to a predetermined potential, said adder havingan auxiliary input lead connected from said main input lead.

15. The invention as defined in claim 14, wherein all of said amplifiermeans have different gains, said clamp means including a single sourceof potential having one pole connected to said reference conductor, andfirst, second, third n'" diodes having one electrode connected from theoutputs of said first, second, third n" adder input leads; and means toclamp the outamplifier means, respectively, each of said diodes havingits other electrode connected to the other pole of said source ofpotential, said diodes being poled in a direction to be back biased bysaid source of potential.

16. The invention as defined in claim 13, wherein all of said amplifiermeans have different gains, said clamp means including a single sourceof potential having one pole connected to said reference conductor, andfirst, second, third n" diodes having one electrode connected from theoutputs of said first, second, third n" amplifier means, respectively,each of said diodes having its other electrode connected to the otherpole of said source of potential, said diodes being poled in a directionto be back biased by said source of potential. l

1. A function generator comprising: an input lead; an output lead; areference conductor providing a point of predetermined referencepotential; a main differential amplifier having noninverting andinverting inputs, and an output connected to said output lead, thenoninverting input to said main amplifier being connected to saidreference conductor; a summing junction; a main feedback resistorconnected from said input lead to said summing junction; first amplifiermeans including a first auxiliary differential amplifier and first andsecond means to provide resistance; second amplifier means including asecond auxiliary differential amplifier, and third and fourth means toprovide resistance, each of said auxiliary amplifiers havinGnoninverting and inverting inputs, and an output, the noninverting inputof said first amplifier being connected to one of said leads, thenoninverting input of said second amplifier also being connected to oneof said leads; a first diode having anode and cathode electrodes, one ofsaid first diode electrodes being connected from the output of saidfirst amplifier; a second diode having anode and cathode electrodes, oneof said second diode electrodes being connected from the output of saidsecond amplifier; source of potential means connected between saidreference conductor and the other diode electrodes, said diodes beingpoled in a direction to be back biased by said source of potentialmeans, said first and second means being connected in series in thatorder from said reference conductor to said one electrode of said firstdiode, said third and fourth means being connected in series in thatorder from said reference conductor to said one electrode of said seconddiode, the inverting input of said first amplifier being connected at apoint between said third and fourth means; and first and secondauxiliary summing resistors connected from the respective outputs ofsaid first and second amplifiers to said summing junction.
 2. Theinvention as defined in claim 1, wherein the noninverting inputs of saidfirst and second amplifiers are connected to the selfsame said one lead.3. The invention as defined in claim 2, wherein said one lead is saidinput lead.
 4. The invention as defined in claim 3, wherein each of saidfirst and second means is a portion of a continuous resistive firstwinding, and a first wiper in slidable engagement with said firstwinding at said point between said first and second means, each of saidthird and fourth means being a portion of a continuous resistive secondwinding, and a second wiper in slidable engagement with said secondwinding at said point between said third and fourth means, said firstwinding and said first wiper forming a first potentiometer, said secondwinding and said second wiper forming a second potentiometer, said firstand second wipers being of said first and second amplifiers,respectively.
 5. The invention as defined in claim 4, including firstand second input resistors connected from said input lead to thenoninverting inputs of said first and second amplifiers, respectively,said first amplifier means having a gain different from that of saidsecond amplifier means, said source of potential means being a singlesource of potential.
 6. The invention as defined in claim 2, whereinsaid one lead is said output lead.
 7. The invention as defined in claim6, wherein each of said first and second means is a portion of acontinuous resistive first winding and a first wiper in slidableengagement with said first winding at said point between said first andsecond means, each of said third and fourth means being a portion of acontinuous resistive second winding, and a second wiper in slidableengagement with said second winding at said point between said third andfourth means, said first winding and said first wiper forming a firstpotentiometer, said second winding and said second wiper forming asecond potentiometer, said first and second wipers being connected tothe inverting inputs of said first and second amplifiers, respectively.8. The invention as defined in claim 7, wherein each of said secondinput resistors connected from said input lead to the noninvertinginputs of said first and second amplifiers, respectively, said firstamplifier means having a gain different from that of said secondamplifier means, said source of potential means being a single source ofpotential, said first amplifier means having a gain different from thatof said second amplifier means, said source of potential means being asingle source of potential.
 9. The invention as defined in claim 3,wherein said first amplifier means has a gain different from that ofsaid second amplifier means, said source of potential means beiNg asingle source of potential.
 10. the invention as defined in claim 6,wherein said first amplifier means has a gain different from that ofsaid second amplifier means, said source of potential means being asingle source of potential.
 11. A function generator comprising: firstand second main input leads; first and second main output leads, saidsecond main leads being connected together; an analog adder having atleast first and second input leads, and an output lead connected to saidfirst main output lead, said first main input lead being connected tosaid first adder input lead; amplifier means having an input and anoutput, said amplifier means input being connected from one of saidfirst main leads, said amplifier means output being connected to saidadder second input lead; and means to clamp said amplifier means outputto a predetermined constant potential.
 12. A function generatorcomprising: a main input lead; a main output lead; a reference conductorproviding a point of predetermined reference potential; an analog adderhaving at least first and second input leads, a first reference leadconnected to said reference conductor, and an output lead connected tosaid main output lead; first and second amplifier means each having aninput lead connected from one of said main leads, and a second referencelead connected to said reference conductor, said first and secondamplifier means having first and second output leads, respectively, saidamplifier means first and second output leads being connected to saidfirst and second adder input leads, respectively; and means to clamp theoutputs of both of said amplifier means to the same constantpredetermined potential.
 13. A function generator comprising: a maininput lead; a main output lead; a reference conductor providing a pointof predetermined reference potential; an analog adder having at leastfirst, second, third ... nth input leads, where n is any positiveinteger, said adder having an output lead connected to said main outputlead; first, second, third ... nth amplifier means each having an inputlead connected from one of said main leads, said first, second, third... nth amplifier means having first, second, third ... nth outputleads, respectively, said amplifier means first, second, third ... nthoutput leads being connected respectively to said first, second, third... nth adder input leads; and means to clamp the outputs of all of saidamplifier means to the same constant predetermined potential.
 14. Afunction generator comprising: a main input lead; a main output lead; areference conductor providing a point of predetermined referencepotential; an analog adder having at least first, second third ... nthinput leads, where n is any positive integer, said adder having anoutput lead connected to said main output lead; first, second, third ...nth amplifier means each having an input lead connected from one of saidmain leads, said first, second, third ... nth amplifier means havingfirst, second, third ... nth output leads, respectively, said amplifiermeans first, second, third ... nth output leads being connectedrespectively to said first, second, third ... nth adder input leads; andmeans to clamp the outputs of all of said amplifier means to apredetermined potential, said adder having an auxiliary input leadconnected from said main input lead.
 15. The invention as defined inclaim 14, wherein all of said amplifier means have different gains, saidclamp means including a single source of potential having one poleconnected to said reference conductor, and first, second, third ... nthdiodes having one electrode connected from the outputs of said first,second, third ... nth amplifier means, respectively, each of said diodeshaving its other electrode connected to the other pole of said source ofpotential, said diodes being poled in a diRection to be back biased bysaid source of potential.
 16. The invention as defined in claim 13,wherein all of said amplifier means have different gains, said clampmeans including a single source of potential having one pole connectedto said reference conductor, and first, second, third ... nth diodeshaving one electrode connected from the outputs of said first, second,third ... nth amplifier means, respectively, each of said diodes havingits other electrode connected to the other pole of said source ofpotential, said diodes being poled in a direction to be back biased bysaid source of potential.